Big data applications driven by machine learning and artificial intelligence underpin the current paradigm of computing. Yet, handling these massive data sets in conventional von Neumann computers leads to significant loss of performance and increase in power dissipation to shuttle the data between the logic and different levels in the memory hierarchy. The future of computing requires new types of non-von Neumann systems that can co-locate compute and memory operations in the same/nearby functional units as well as execute different unconventional functions in a compact efficient manner. Compared to the conventional CMOS technology, emerging nanodevices intrinsically combine logic and memory, and can lead to more energy-efficient and higher performance hardware platforms for such computing applications. Furthermore, unlike CMOS transistors, such nano-devices can map the dynamics of neuron and synapses in biological brains thereby leading to the possibility of extremely, efficient realization of brain-like computing cores. Our goal is to understand how to leverage the interesting properties of our nanodevices (such as stochasticity, hysteresis, polymorphism, non-volatility) for unconventional computing architectures. We heavily collaborate with research group working on circuits, architectures, systems and algorthms to connect our work at device level to the higher levels of abstractions.

Publications:

Wang et al. IEEE Electron Dev. Lett. 38, 1614 (2017). Presentation: ISVLSI2018