Director’s Welcome

Welcome to the Georgia Tech PRC

The 3D Systems Packaging Research Center (PRC) represents the #1 Academic Center focused on leading edge packaging around the globe. The PRC started as an NSF Engineering Research Center (ERC) in 1994. After 12 years of support from the National Science Foundation (NSF), the center is self-sufficient today and has been for the last several years. Our focus is on advanced package integration leading to System on Package (SOP) technologies, a paradigm that enables the miniaturization and scaling of systems.

In the semiconductor world, the metric for integration is transistor density with scaling driven by Moore’s law. However, transistor scaling alone doesn’t lead to miniaturized systems since this requires package scaling. A metric often used in packaging is system component density driven by interconnect dimensions, materials and processes supported by packaging technologies. We view system scaling as a combination of transistor scaling and package scaling that closes the gap between the two, where next-generation devices combined with advanced packages can lead to scaled heterogeneous integrated systems. Such an approach we believe will continue to drive system scaling as shown for computing in Figure 1 where scaling not only leads to smaller size but also enables higher performance and increased functionality.

Figure 1: System Scaling for a computing system

As transistors are scaled beyond 7nm, the cost of monolithic integration is increasing exponentially with die area, leading to the need for partitioning large dies into smaller dies that can be seamlessly connected to each other.  This industry trend towards polylithic integration relies on the package for system scaling. In addition, systems of tomorrow driven by artificial intelligence, wireless connectivity, energy conservation and others will require dies from different processes and functionality to be connected together in a single package. We see this trend as leading to systems in the near future consisting of a multitude of chips (~100) from multiple domains (digital, RF, analog, photonics, sensing) and processes (7nm, 64nm, 100nm), fabricated from different IC foundries (6”, 8”, 12” wafers), assembled and interconnected on a package with fine line wiring and passives. We call such systems as integrated heterogeneous systems.

At the PRC we are leading the world in heterogeneous integration by developing System on Package (SoP) technologies that provide significant benefits in performance, miniaturization, functionality and cost. Our approach is unique in three ways. It goes beyond the traditional exploratory research by faculty and graduate students to an integrated, interdisciplinary and system level approach driven by applications with focus on: 1) leading-edge electronic systems research, 2) workforce development through cross-disciplinary education, and 3) industry collaboration based on supply chain, all focusing on future transformative technologies.​

We welcome you to the center and look forward to discussing our research with you. We are constantly looking for collaborative opportunities with industry and industry teaming for federal programs. If you are a graduate student interested in research related to heterogeneous integration, we are always excited to talk to you.


Madhavan Swaminathan