September 2021 Newsletter

Director’s Corner

Greetings! Welcome to the quarterly newsletter from the 3D Systems Packaging Research Center (PRC).

We are an academic center leading the world in Heterogeneous Integration using Advanced Packaging as a platform for enabling future microelectronics systems. As a center we are gearing up to respond to the United States Innovation and Competitiveness Act (USICA), the CHIPS for America Act, and U.S. semiconductor shortage, through research in heterogeneous integration that will drive emerging applications such as quantum computing, artificial intelligence, wireless, and automotive, among others.

We currently collaborate with 41 companies around the globe, several national centers and 14 universities on the development of new packaging technologies that represent game changers. We are constantly looking for new partners. If you are a company focusing on semiconductor technology/advanced packaging or a university wanting to collaborate with us please do let us know. To learn more about PRC, please visit us at We provide below some recent research highlights.

Madhavan Swaminathan

Research Highlights

Antenna in Glass Substrate for 6G Applications
The development of next generation (6G) wireless communications is expanding new spectrum bands into sub-terahertz (sub-THz) frequencies above 100 GHz, where the antenna represents a key component. D-band (110 – 170 GHz) in particular, is being considered for many applications such as wireless backhaul links, short range device-to-device communications, and high-speed indoor connections. Coverage becomes more limited as we go up in frequencies due to factors such as increased path loss and material losses, which makes it more difficult to satisfy the link margin. For this reason, high-gain antenna arrays in tightly integrated packages are critical for next generation 6G modules. PRC graduate students Kai-Qi Huang and Serhat Erdogan are working on antenna-in-package technologies in glass substrates for D-Band applications and have recently demonstrated 2-D patch array and quasi-Yagi antenna with monopole radiator for wireless links and handset applications. This work is being done in collaboration with ASCENT (, one of six centers supported through the Joint University Microelectronics Program (JUMP).  Read here.

6G Communications: Wireless Link and Handset Applications (left); 2D-Antenna Array (published at 2021 ECTC) and Single Antenna Element for Handset (to be published)

Automotive Needs lead to Novel Power Electronics Package with Integrated Cooling

Traditional power module packaging solutions developed for Si technology are now limiting the benefits of silicon carbide (SiC) power modules. Many components with a single function are limiting the maximum power density achievable with state-of-the-art technologies. Therefore, new solutions are required for compact, efficient, and reliable SiC-based motor drives. This study explores the benefits of a novel integrated cooling strategy (ICS) with multi-functional heat spreaders, serving both electrical and thermal functions. Vapor chamber integration is shown to be a thermal solution to increase power density levels if sufficiently high effective thermal conductivities are achieved. This work was presented at the 2021 IEEE ITherm conference by graduate student Ahmet Mete Muslu along with co-authors R. Wong, V. Smet, and Y. Joshi. Further details can be found here.

Power Modules: Standard power card (left), Integrated Cooling with Copper or Vapor Chamber lead frames (center), Variation of junction temperature with thickness of heat spreading layer for different package configurations (right)

Design Space Exploration and Extrapolation using Machine Learning

With the tremendous growth of the semiconductor industry, compute power and memory have become cheap and accessible. One interesting outcome of this growth has been the adoption of machine learning (ML) in several fields traditionally dominated by physics and mathematics. Solving electrically large systems by analyzing their electromagnetic, thermal, and mechanical behavior can be a time- and memory-intensive process. But, as is well known today, such analyses become inevitable with the advent of heterogeneous integration in highly integrated interposer solutions. Finding an optimal design in such large and complex spaces is one element of the cycle. But how about the ability to accurately extrapolate a system response outside a predetermined design space? We address this issue in the context of packaging through a recent paper authored by PRC graduate student Osama Waqar Bhatti that appeared in the 2021 IEEE Microwave Magazine.  This work is being done in collaboration with CAEML, an NSF Center ( Read here.

Machine Learning: Neural Network Architecture (left) and Design Space Extrapolation for 5th Order Hairpin filter for 5G (right)

Faulty FOCUS

Congratulations to Tushar Krishna and Arijit Raychowdhury who have been selected for 2021 Qualcomm Faculty Awards (QFA). They are both faculty members in the Georgia Tech School of Electrical and Computer Engineering (ECE) and 3D Systems Packaging Research Center (PRC). The QFA program supports key professors and their research, with the goal of strengthening Qualcomm’s engagement with faculty who also play a key role in Qualcomm’s recruiting of top graduate students.

Tushar was chosen for the QFA for his contributions to the modeling, analysis, and design of high-performance, energy-efficient hardware acceleration platforms.

Arijit was chosen for the QFA for his contributions to low-power system-on-a-chip (SoC) design, including his group’s work on embedded power management and delivery circuits that have impacted Qualcomm’s internal research and development.


Student Spotlight

A. Mete Muslu received the B.Sc. and M.Sc. degree in mechanical engineering from Ozyegin University, Istanbul, Turkey, in 2018 and 2020 respectively. He is currently pursuing a Ph.D. degree at Georgia Institute of Technology, Atlanta, United States, with a focus on vertically integrated power delivery and thermal management in SiC drive inverter packages. His research interests include the multi-physics design of high-power electronics, high-temperature packaging, thermal management of optoelectronics. Mr. Muslu was a member of a competition team who received the Best Commercial Potential Award in developing a novel thermal connector design sponsored by the U.S. Defense Advanced Research Projects Agency (DARPA), in 2015.



Congratulations to our 2021 Graduate!

Claudio Alvarez Barros, Ph.D.
Thesis: Design and Demonstration of Embedded Inductors for High-Voltage Integrated Voltage Regulators
• Read here

Employer: Intel Corp.


Upcoming and Recent Events

  • Distinguished Lecture (Virtual): “Insulating materials and dielectrics: a key issue and the Achille’s heel of the future electronic and electrical engineering technologies presented by Prof. Petru Notingher, Institut d’Electronique et des Systemes (IES), Universite de Montpellier, September 30, 2021, 11:00 AM EDT. This event is free. Registration is required at the link here.
  • Short Course on System Level Packaging (Virtual) presented by Dr. Vidya Jayaram (Intel Corp.), October 8, 2021, 11:00 AM EDT. This event is free. Registration is required at the link here.
  • Center for Advanced Electronics through Machine Learning (CAEML) Industry Advisory Board Meeting (Hybrid), Georgia Tech, October 26 – 27, 2021. Registration required. By invitation only.
  • PRC Industry Advisory Board (IAB) Meeting (Hybrid): November 18 – 19, 2021. Registration is required – by invitation only.
  • Distinguished Lecture: Professor Joseph Bardin on Quantum Computing with Microwaves presented on June 30. Recording here.