VISION
Moore’s law has been the driver for the semiconductor industry for more than four decades which has led to phenomenal transistor density within the chip. Since the mid-1990s, with the emergence of mobile phones and other consumer devices, package level integration has increased significantly as well. Sometimes referred to as “More than Moore” integration, these advances have led to the miniaturization of packages, integration of components into the package, miniaturization of components and introduction of new materials, leading to an
increase in the system component density outside the chip. A combination of “Moore” (IC) and “More than Moore” (package) scaling has led to the shrinking of the size of electronic systems over the last two decades, and this trend is expected to continue in the future. Georgia Tech has been in the fore front for both Moore and More than Moore scaling technologies.
All electronic systems, no matter how large or small, need to be powered. However, the amount of power required by the system can vary from several hundred watts for a server to a few micro or nano watts for sensor nodes. This requirement determines the source of power (battery or energy harvesting), methods used to deliver power (converters, regulators and network) and management of the load (control). Hence, applications classified as high/medium power, low power, ultra-low power and ultra- ultra-low power will each have its own set of unique requirements for generating, distributing and managing the power delivered. With energy minimization being a key driver for industry, advanced techniques such as near threshold voltage signaling, dynamic voltage frequency scaling (DVFS), and others are being developed to manage and minimize power consumption, leading to power delivery networks that are becoming increasingly complex. Given the vast expertise and experience at Georgia Tech in the area of power delivery for microsystems, we have created a comprehensive consortium on this topic working closely with industry, where application specific technologies in the area of power delivery can be developed and transferred to industry. With the participation of both undergraduate and graduate students in such a consortium, we believe that Georgia Tech is uniquely positioned to educate and create a workforce that would be proficient in power delivery methods and technologies for emerging electronic systems.
CHALLENGES
Power delivery for any electronic system consists of a source, network and load as shown. AC outlets, batteries, transducers and RF signals are various methods for generating the energy at the source. This energy needs to be rectified to generate DC voltage, which in turn needs to be up or down converted, depending on the source of energy, regulated, and distributed, before it can be used by electronics. These elements when connected together along with storage components such as capacitors and inductors form the power distribution network, which collectively transfers energy to the load.
The interaction between the switching currents at the load and the parasitics in the network cause power supply transients that need to be regulated, which often times require decoupling capacitors. In addition, power management at the load is required to conserve and minimize the usage of energy. With miniaturization of systems over the last two decades, power delivery has become a very complex problem and this complexity is being amplified manifold with emerging applications that require high levels of regulation at ultra-low power in a very small form factor.
With miniaturization comes strong interaction between the constituents of the power delivery system where co-design of the elements becomes necessary. Some of the challenges for providing clean power to the switching circuits are: i) development of high speed and high efficiency integrated voltage regulators with good regulation capability, ii) integration of high density storage elements such as capacitors and inductors in the chip and package, iii) wireless power transfer in a small form factor with buck/boost converters and integrated battery, iv) development of robust power distribution networks with minimum decoupling capacitors, v) maximizing isolation between mixed signal electronics integrated together in a tiny package, vi) rectifier less energy conversion, vii) energy harvesting from far field with high efficiency, viii) micro-architectural power management methods and ix) co-design of the elements which are distributed in the chip, package and printed circuit board.
THRUST AREAS
The PDES consortium consists of four broad thrust areas to address the power delivery challenges described earlier. The thrusts are 
integrated together using a test bed for the integrated analysis of power converters, regulation, distribution and load. Hence, the impact of each developed technology within a thrust on system performance and its effect on other parts of the power delivery system can be evaluated using the test bed. The four thrust areas are: 1) Integrated Voltage Regulators (IVRs), 2) Power Distribution, 3) Wireless Power Transfer and 4) Power Delivery Solutions for Self-Powered Internet-of-Thing Devices.
CONSORTIUM MEMBERSHIP
As a consortium, a membership structure offering multiple levels of participation has been deployed. A company can join the consortium at any time. By becoming a member, a company can participate in all of the research in the consortium.
Further information on the PDES consortium is available here:
COLLABORATING FACULTY
• Paul A. Kohl • Saibal Mukhopadhyay • Arijit Raychowdhury • Madhavan Swaminathan • Hua Wang • Anto K. Davis • Mohamed Bellaredj
INDUSTRY PARTNERS
• AVX • Global Foundries • Ibiden • Oracle • Samsung • Shinko • TSMC • Xilinx