June 2021 Newsletter

Director’s Corner

Greetings! Welcome to the quarterly newsletter from the 3D Systems Packaging Research Center (PRC).

We are an academic center leading the world in Heterogeneous Integration using Advanced Packaging as a platform for enabling future microelectronics systems. Being an industry focused and application driven center, we conduct research in four broad areas namely High-Performance Computing (including Artificial Intelligence and Quantum Computing), Automotive Electronics, Wireless Communication (5G/6G) and Harsh Environment. Along with being a graduated self-sufficient NSF Engineering Research Center we also collaborate closely with other national and international organizations.

We just concluded another successful bi-annual industrial advisory board (virtual) meeting with a total participation of 162, of which 109 came from industry. To learn more about PRC, please visit us at www.prc.gatech.edu.  We provide below some recent research highlights.

Sincerely,
Madhavan Swaminathan


Research Highlights

Novel method for Microvia Reliability Improvement

In the current generation of electronic packages, polymer dielectrics have enabled high bandwidth at low cost. However, polymer dielectrics have a high coefficient of thermal expansion (CTE) which leads to via-reliability challenges. The mismatch in the CTE between copper and polymer leads to large strain in the vias that ultimately leads to failure during thermal cycling. As via dimensions continue to reduce below 3mm, it becomes increasingly difficult to fabricate reliable vias. Hence methods to improve via reliability are required. A novel technique for via reliability improvement is proposed using thermo-mechanical simulations wherein the formation of a groove in the copper contact pad leads to significant reduction in the strain at the contact region, leading to enhanced reliability. This work was published by graduate student P. Nimbalkar at the 2021 IEEE Electronic Components and Technology Conference (ECTC). Read here.

Microvia Reliability: (a) Traditional via geometry, (b) 3D model used in simulations, and (c) Effect of groove depth  on strain in the via [Inset: novel via geometry with groove in Cu pad]

Substrate Integrated Waveguide (SIW) for 6G Communication

The use of 6G carrier frequencies above 100 GHz presents unprecedented challenges for the development of milli-meter wave wireless modules. Glass-based packaging has gained significant attention in recent years for supporting such high frequencies due to its ability to support fine feature sizes, ultra-smooth surface, excellent dimensional stability, and large panel sizes. At such high frequencies, Substrate Integrated Waveguide (SIW) technology shows promise since they not only can be used to guide electromagnetic waves but also to form filters, slot antennas and other components. Through collaboration with ASCENT https://ascent.nd.edu/), we recently demonstrated glass-based SIWs in D-band (110 GHz to 170 GHz) with an insertion loss of 0.5-0.7 dB/mm. This represents a major accomplishment for glass-based packaging which was presented by graduate student M. Rehman at the 2021 IEEE International Microwave Symposium (IMS). Read here.

SIW: Process flow for fabrication using glass substrate (left), fabricated component (middle), and Performance Comparison (right)

Bayesian Learning Applied to Semiconductor Packaging

As the use of electronics increases, so does the need for highly specialized electronic components. Now, a new method for optimizing electronics has been developed that will dramatically decrease the time that it takes to get new components and systems to market.

Traditionally, electronic components and systems, such as semiconductors and chips, are tuned and tested over months before they are optimized for a task. A new method developed, which is now available to companies as a software program, uses a statistical technique based on probabilities called Bayesian optimization to replace the usual trial-and-error method.  This method was developed in collaboration with CAEML, an NSF Center (https://publish.illinois.edu/advancedelectronics/). Further details are available at https://iucrc.nsf.gov/centers/achievements/bayesian-learning-applied-to-semiconductor-packaging/.


Research Faculty Focus

Mohanalingam (Mohan) Kathaperumal received his Ph.D. in Chemistry from Indian Institute of Science, Bangalore in 1994 with MS and BS degrees in Chemistry from Madras Christian College, Chennai, India. Mohan is currently a senior research engineer at the PRC leading the activities in advanced materials and process development by targeting applications in AI/HPC, 5G & 6G. Mohan is also working on hybrid/photosensitive materials with very large breakdown strength/high temperature stability for energy storage/electronics/photonics applications as well as multi-photon based fabrication and imaging studies of complex structures.

 

 


Student Spotlights

Congratulations to Osama Waqar Bhatti, a graduate student in ECE, who received the Best Paper Award at the 2021 International Symposium on Quality Electronic Design (ISQED’21). The title of the award-winning paper was “Design Space Extrapolation for Power Delivery Networks using a Transposed Convolutional Net.” In this paper, a transposed convolutional network is proposed for learning the parameters of a power delivery network for high performance computing with a focus on extrapolation (not interpolation), wherein a tenfold decrease in computational time was demonstrated as compared to other methods. Read here..

 

 

Congratulations to Venkatesh Avula, a graduate student in ECE, who received the Best Overall Poster Paper Award at ITherm 2021. The title of the award-winning paper was “Augmented finite element method (AFEM) for the linear steady-state thermal and thermomechanical analysis of Heterogeneous Integration architectures”. In analyzing Multiphysics interactions, traditional modeling methods use sequential, time-stepping procedures and suffer from computational complexity. In this paper novel frequency-domain models are used to exploit the periodic loading conditions used in reliability studies where the responses are computed in an effective manner. A glass panel-embedded package is used as a test case which provides for a 200X speed-up as compared to traditional methods. Read here.

 

Congratulations to Pratik Nimbalkar, a graduate student in MSE, who was selected to receive the Christopher Sanders Fellowship for Summer 2021.  He was selected based on his academic performance in coursework and research, his advisor’s recommendation and his involvement in community, co-curricular or extracurricular activities as well as fostering of MSE and GT values.

 

 

 


Congratulations to our recent graduates!

Siddharth Ravichandran, Ph.D.

Thesis: Design and Demonstration of 3D Glass Panel Embedding for High Bandwidth and Power Efficiency

Employer: Startup

 

 

Omkar Gupte, Ph.D.

Thesis: Modeling, Design and Demonstration of a Single Innovative Metallurgical System for Both Socketable and Surface-Mountable Board-Level Interconnections

Employer: AMD, Texas

 


Upcoming and Recent Events (All Virtual)

  • Distinguished Lecture: “Quantum Computing with Microwaves” presented by Prof. Joseph Bardin, University of Massachusetts Amherst’s School of Electrical and Computer Engineering, June 30, 2021, 11:00 AM EDT. This event is free. Registration here.
  •  Short Course on Electronics Packaging presented by Dr. Jack Moon, July 30, 2021, 11:00 AM EDT. This event is free. Registration is required. Additional details provided shortly.
  • Distinguished Lecture presented by Prof. Petru Notingher, Universite de Montpellier, Institut d’Electronique et des Systemes (IES), France, September 17, 2021, 11:00 AM EDT. This event is free. Registration is required. Additional information provided shortly.
  • Short Course: Omkar Gupte, Board-Level Interconnections: Materials, Processes and Recent Advances, April 30, 2021. Watch here.
  • Distinguished Lecture: Subramanian Iyer, Flexible Hybrid Electronics 2.0, March 25, 2021. Watch here.